BusinessTelecommTaiwan SystemC Users Host November Meeting

Taiwan SystemC Users Host November Meeting

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The Open SystemC Initiative , an independent non-profit organization dedicated to supporting and advancing SystemC as an industry-standard language for electronic system-level (ESL) design, announces the third meeting of the Taiwan SystemC Users Group from November 14-15 at the at the Industrial Technology Research Institute in Hsinchu and National Cheng Kung University in Tainan.

For more information and to register, visit http://tinyurl.com/3g4dto6 (Chinese) and http://www.systemc.org/news/events/ (English).

The agenda features two tracks — high-level synthesis and system-level modeling — and includes eight technical presentations by leading universities and top electronics companies who will present the practical usage of the SystemC standard in applications related to semiconductor/IC design, embedded system design and mixed-signal system-level architecture.

Stan Krolikoski, OSCI board member and chair of the IEEE 1666 SystemC Working Group, will kick off each event with a presentation about technical developments of the SystemC standard including an update on transaction-level modeling (TLM).

----------------------------------------------------------------------------
                                                               TSCUG Chair,
09:00~ 09:10 Opening                    Dr. Alan P. Su         Synopsys
----------------------------------------------------------------------------
             OSCI and IEEE SystemC
09:10~ 10:00 Standards                  Stan Krolikoski        OSCI
----------------------------------------------------------------------------
             Introduction to SystemC-
10:00~ 10:50 AMS                        Prof. Lih-Yih Chiou    NCKU
----------------------------------------------------------------------------
10:50~ 11:10                           Coffee break
----------------------------------------------------------------------------
             System Design Exploration
             with ESL Design
11:10~ 12:00 Methodology                Dr. Jen-Chieh Yeh      ICL/ITRI
----------------------------------------------------------------------------
12:00~ 13:20                           Lunch Break
----------------------------------------------------------------------------
             Track 1:                   Track 2:
             High Level Synthesis       System Level Modeling & Verification
----------------------------------------------------------------------------
             Optimized High Level       Formal Verification of SystemC
             Synthesis Solution for     Designs
             Multimedia Design and DMA  Prof. Chung-Yang (Ric) Huang, NTU
             Controller                 (Nov 14)
             Steve Wang, Cadence        Why Modeling Accuracy is Important
13:20~ 14:00                            Winn Cheng, Maojet (Nov 15)
----------------------------------------------------------------------------
             CyberWorkBench: C-based    Mentor ESL Flow
             High Level Synthesis and   Stewart Li, Mentor Graphics
             Verification
             Dr. Kazutoshi
14:00~ 14:40 Wakabayashi, NEC
----------------------------------------------------------------------------
14:40~ 15:00                           Coffee Break
----------------------------------------------------------------------------
             Case Study of an ESL       To be determined
             Solution: High Level
             Synthesis from Systems to
             Silicon
15:00~ 15:40 Jeff Kuo, Synopsys
----------------------------------------------------------------------------
             User Experiences of Forte  Why Modeling Accuracy is Important
             Cynthesizer                Winn Cheng, Maojet (Nov 14)
             Charlie Uang, Maojet       ESL Methodology in the Development
                                        of 3D Graphics SoCs
15:40~ 16:20                            Prof. Ing-Her Huang, NSYSU (Nov 15)
----------------------------------------------------------------------------
16:20~ 16:30                   Lottery Drawing and Closing
----------------------------------------------------------------------------

 

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